A novel dual gate oxide （DGO） process is proposed to improve the performance of high voltage CMOS （HVCMOS） devices and the compatibility between thick gate oxide devices and thin gate oxide devices. An extra sidewall is added in this DGO process to round off the step formed after etching the thick gate oxide and poly-silicon. The breakdown voltages of high voltage nMOS （HVnMOS） and high voltage pMOS （HVpMOS） are 168 and - 158V, respectively. Excellent performances are realized for both HVnMOS and HVpMOS devices. Experimental results demonstrate that the HVCMOS devices work safely at an operation voltage of 100V.
High-voltage nMOS devices are fabricated successfully and the key technology parameters of the process are optimized by TCAD software. Experiment results show that the device＇s breakdown voltage is 114V, the threshold voltage and maximum driven ability are 1.02V and 7.5mA（W/L = 50）, respectively. Experimental results and simulation ones are compared carefully and a way to improve the breakdown performance is proposed.
