培养新工科创新实践人才是推动科技进步和创新发展的关键环节。基于集成电路新工科创新实践实训基地,校企通过“紧扣国家战略与全球需求,共筑发展引擎,共培双师队伍,共研实用案例库,共创人才培养新课程”等多维合作方式,建立了“产业链–教育链–创新链–人才链”集群联动发展机制。依托集成电路设计–全尺寸微纳器件制备–封装测试–系统与应用全产业链的创新实践平台,构建了集成电路产教融合过程中企业、教师、学生共同良性发展的育人生态系统。激发了学生创新实践的源动力,促进了学生的成长。为培养新一代集成电路卓越工程师提供可推广、可复制的人才培养新路径。The cultivation of innovative and practical talents for new engineering disciplines is a pivotal factor in the promotion of scientific and technological progress and innovative development. Based on the innovative practical training base for the new engineering disciplines of integrated circuits, the school and enterprises have established a cluster-driven development mechanism integrating “industrial chain-educational chain-innovation chain-talent chain” through multi-dimensional collaboration, such as “aligning with national strategies and global demands, jointly building the engine for development, co-cultivating a dual-qualified teaching faculty, collaboratively developing practical case libraries, and co-creating innovative talent cultivation curricula.” By establishing an innovation and practice platform for the entire industry chain of IC design-full-size micro-nano device preparation-packaging and testing-system and application, we have created a nurturing ecosystem in which enterprises, teachers and students can develop together in the process of integrating IC manufacturing and education. It stimulates the source of innovative practice and promotes student growth. In order to cultivate a new generation of excellent integrated ci
采用软件仿真一系列横向双扩散金属氧化物半导体场效应管(Laterally double-diffused metal oxide semiconductor,LDMOS)结构,为缓解绝缘体上硅(Silicon on insulator,SOI)器件的击穿电压VB和漂移区的比导通电阻Ron.sp之间的矛盾关系,提出了一种具有纵向源极场板的双槽SOI新结构。该结构首先采用槽栅结构,以降低比导通电阻Ron.sp;其次,在漂移区内引入SiO_2介质槽,以提高击穿电压VB;最后,在SiO_2介质槽中引入纵向源极场板,进行了电场重塑。通过仿真实验,获得器件表面电场、纵向电场曲线及器件击穿时的电势线和导通时的电流线等。结果表明,新结构的VB较传统LDMOS器件提高了121%,Ron.sp降低了9%,器件优值FOM值达到15.2 MW·cm^(-2)。
为了提高SOI(silicon on insulator)器件的击穿电压,同时降低器件的比导通电阻,提出一种槽栅槽源SOI LDMOS(lateral double-diffused metal oxide semiconductor)器件新结构.该结构采用了槽栅和槽源,在漂移区形成了纵向导电沟道和电子积累层,使器件保持了较短的电流传导路径,同时扩展了电流在纵向的传导面积,显著降低了器件的比导通电阻.槽栅调制了漂移区电场,同时,纵向栅氧层承担了部分漏极电压,使器件击穿电压得到提高.借助2维数值仿真软件MEDICI详细分析了器件的击穿特性和导通电阻特性.仿真结果表明:在保证最高优值的条件下,该结构的击穿电压和比导通电阻与传统SOI LDMOS相比,分别提高和降低了8%和45%.
