The effects of self-heating and traps on the drain current transient responses of AlGaN/GaN HEMTs are studied by 2D numerical simulation. The variation of the drain current simulated by the drain turn-on pulses has been analyzed. Our results show that temperature is the main factor for the drain current lag. The time that the drain current takes to reach a steady state depends on the thermal time constant, which is 8μs in this case. The dynamics of the trapping of electron and channel electron density under drain turn-on pulse voltage are discussed in detail, which indicates that the accepter traps in the buffer are the major reason for the current collapse when the electric field significantly changes. The channel electron density has been shown to increase as the channel temperature rises.
The effect of drain-source voltage on A1GaAs/InGaAs PHEMTs thermal resistance is studied by experimental measuring and simulation. The result shows that A1GaAs/InGaAs PHEMTs thermal resistance presents a downward trend under the same power dissipation when the drain-source voltage （VDs） is decreased. Moreover, the relatively low VDS and large drain-source current （IDs） result in a lower thermal resistance. The chip-level and package-level thermal resistance have been extracted by the structure function method. The simulation result indicated that the high electric field occurs at the gate contact where the temperature rise occurs. A relatively low VDS leads to a relatively low electric field, which leads to the decline of the thermal resistance.
The phenomenon of self-changing on the device parameters and characteristics after a step voltage stress was applied to the gate is studied in A1GaN/GaN high electron mobility transistors. The device was measured every 5 rain after the stress was removed. The large-signal parasitic source （drain） resistance, transfer characteristics, threshold voltage, drain-source current, gate-source （drain） reverse currenwvoltage characteristics changed spontaneously after the removal of the stress. The time constant of tile self-changing was about 25 27 rain. The gate-source （drain） capacitance-voltage characteristics were constant during this process. Electrons were trapped by the surface states and traps in the AIGaN barrier layer when the device was under stress. The traps in the AIGaN barrier layer then released electrons in less than 10 s. The surface states released electrons continuously during the entire measurement stage, leading to the self-changing of mearsurement result.
